The 2015 International Technology Roadmap for Semiconductors (ITRS) (http://tinyurl.com/hqafrmu), from the Semiconductor Industry Association, predicts that Moore’s Law will be coming to end sooner rather than later: as early as 2021, in fact.
The ITRS is a document, first published in 1998, that examines the challenges and opportunities facing the semiconductor industry to 2030. This is the final installment, as the decision has been taken to move to new ways to progress semiconductor research.
According to the SIA, copper-on-silicon technology will reach its practical limits in 2021. Even if it is physically possible to fit more transistors onto a chip by this point, it will probably not be financially viable.
Another problem is heat dissipation. Certain thermal limits were reached towards around the beginning of the millennium – or, as the SIA puts it, “Even though the transistor count has kept on increasing…at Moore’s Law pace, and transistors are able to operate with each new technology generation at higher frequencies than before, it has become practically impossible to keep on conjunctly increasing both of these factors due to physical limitations on power dissipation; one of the two features (number of transistors or frequency) had to level off in order to make the integrated circuits capable to operate under practical thermal conditions. Frequency was selected as the sacrificial victim and it has stalled in the few gigahertz since the middle of the previous decade.”
The rise of mobile has also proven a challenge for chip makers. The emphasis has, for several years, been on lowering power consumption and die size: from 28nm to 14nm and, soon, to 10nm. 6nm will probably be the practical limit in terms of ICs.
Despite the demand for low power consumption, however, the demand for more transistors continues unabated. As an example, Apple’s A5 application processor contained 1 billion transistors; the A6 contained 2 billion and the A6X 3 billion. To satisfy these demands, says the SIA, we are entering a new era of scaling:
“Geometrical scaling characterised the 1970s, 1980s and 1990s. This was the first generation of transistor scaling. Major material and structural limitations were identified in the mid-90s, and the research community initiated the foundation of a new scaling approach… named Equivalent Scaling.
“Strained silicon, high-k/Metal gate, FinFET and the use of other semiconductor material (for example, germanium) represent the main features of this scaling approach. As features approach the 10nm range and below it becomes clear that the semiconductor industry is running out of horizontal space.”
Memory – particularly flash memory – will lead the way for microprocessor technology in the future. Chip makers, meanwhile, will turn to methods like stacked 3D chips to increase power.
Analyst Comment
As I quoted in an editorial a few month’s ago, (The End of Moore’s Law?), “”there’s a law about Moore’s Law – the number of people predicting the end of Moore’s Law doubles every two years”. However, the SIA is very authoritative. The end of Moore’s Law will not mean the end of innovation or of continuing development in semiconductor technologies. I have complete faith in the ability of engineers to keep boosting performance, efficiency and reducing cost of chips. (BR)
