An alliance of Globalfoundries, Samsung and IBM Research has developed the first 7nm node test chips with functioning transistors. The work, in the USA, could lead to the ability to place more than 20 billion transistors on a chip.
Researchers had to bypass conventional manufacturing approaches. Among the processes used were silicon germanium (SiGe) channel transistors and extreme ultraviolet lithography integration, at multiple levels.
Today’s chips are, at their smallest, 14nm, with 10nm devices under development. The work of the alliance led to area scaling improvements close to 50% over 14nm processes. New technologies – such as SiGe channel material, innovations to stack transistors at a sub-30nm pitch and the use of EUV lithography – could result in ‘at least’ 50% improvements in power and performance, for next-gen systems.