Toshiba Corporation today announced the launch of “TZ1201XBG”, an application processor for wearable devices, as the latest addition to its ApP Lite™ family for the Internet of Things (IoT). Samples of the TZ1201XBG ApP Lite processor will begin shipping in April and mass production is scheduled to begin in summer 2016. The TZ1201XBG will be showcased at the 2016 International Consumer Electronics Show (CES), to be held from January 6 to January 9 in Las Vegas, U.S.A.
The TZ1201XBG integrates an ARM® Cortex®-M4F processor and is designed to operate at active current consumption of 78-microamps per megahertz (MHz) in normal operation mode. It works with the power management software for about one week in pulse measurement applications or for about one month in watch applications with a 200mAh battery.
The TZ1201XBG’s dedicated 2D graphics accelerator reduces CPU utilization and power dissipation, enabling smooth functioning of the graphical user interface (GUI). Integrated audio interfaces for voice command[1] and voice trigger processing[2], and 2D graphics accelerator ensure customers enjoy the high level of user experience.
Compared with previous models, the improved high-precision Analog Front End circuit (AFE) can measure extremely weak signals (about 10 microvolts), such as EEG or EMG (brain and muscle scans, respectively), as well as impedance, which can be used to determine stress levels by calculating skin resistance. The AFE also supports up to 4-channel voltage/current/impedance multi-sensing with only a minimal addition of external components. By integrating the software and various services, the data measured by the AFE can be utilized to create new applications as well as new market targets.
In addition to 2.2MB of integrated high-capacity SRAM, the TZ1201XBG incorporates e•MMC™[3]/SDIO interfaces that support external memory ICs such as SPI NOR, SPI NAND and e•MMC™. This support provides designers with the flexibility to specify the most suitable memory ICs and capacities for their devices. Together with the embedded data compressor, the TZ1201XBG enables high-capacity data storage for long periods of time without frequent data uploads.
Key Features |
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? | Low power design | |||
— | Designed for active current consumption of 78-microamps per megahertz (MHz) | |||
? | Single package for the wearable application | |||
— | Supports various I/Os, such as I2C[4], UART[5], SPI[6], for use of external sensors and peripherals devices to monitor durations and levels of physical activity. | |||
— | High-performance 2D graphics accelerator ensures smooth functioning of the graphical user interface (GUI). | |||
— | Data security supported by AES and SHA256 and the integration of a true random number generator. | |||
— | Embedded data compressor and decompressor | |||
? | Integrates 2.2MB of high-capacity memory | |||
? | High-precision AFE | |||
— | Up to 4-channel voltage/current/impedance multi-sensing | |||
— | Three configurable amplifier modes with only minimal addition of external components, instrumentation amplifier/trans impedance amplifier/ programmable gain amplifier (PGA) | |||
— | Up to 22-bit effective number of bits (ENoB) dedicated about 10 microvolts | |||
Applications
Wearable devices such as activity monitors, smart watches, bracelets and glasses-type devices.
Main Specifications |
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Part number | TZ1201XBG | |
CPU | ARM Cortex-M4F | |
Maximum Frequency | up to 120MHz | |
Embedded SRAM | 2.2MB | |
e•MMC | 2ch | |
External bus | 1ch | |
Graphics accelerator | 2D | |
LCD Controller | MIPI® DBI Type B, Type C, DSI | |
GPIO | 120 bits | |
I2C (Master/Slave) | 2ch | |
UART | 4ch | |
DMA | 16ch | |
AES | 128/192/256-bits key length | |
True random generator | 1 unit | |
Compression & decompression | 1 unit | |
SPI | 4ch | |
Quad SPI for Flash memory | Supported | |
PWM | 8ch | |
32-bit Timer | 2ch | |
Watchdog Timer | 1ch | |
Instrumentation amplifier?Gain | ×1 to ×4 | |
PGA?Gain | ×1 to ×32 | |
12-bit ADC | 16ch | |
24-bit ADC | 4ch | |
DAC | 1 | |
LED driver | 4 | |
USB | USB 2.0 Device 12 Mbps, 1 port 4 bidirectional endpoints | |
package dimensions
(W x L x H , mm) |
8.0 ×8.0 ×0.6 | |
Engineering sample | April 2016 | |
Mass production | Summer 2016 | |
Notes
1: Voice command: An application that realizes voice control of devices.
2: Voice trigger processing: Operation of the system based on detection of voice commands.
3: Embedded Multi Media Card: a family of NAND flash memories (NAND) with control functionality such as ECC, wear levelling and bad-block management. It also eliminates the need for users to be concerned about direct control of NAND.
http://toshiba.semicon-storage.com/ap-en/product/memory/nand-flash/mlc-nand/emmc.html
4: Inter-Integrated Circuit: A multi-master, multi-slave, single-ended, serial computer bus invented by Philips Semiconductor (now NXP Semiconductors).
5: Universal Asynchronous Receiver Transmitter: A computer hardware device that translates data between parallel and serial forms.
6: Serial Peripheral Interface bus: A synchronous serial communication interface specification used for short distance communication developed by Motorola (now ON semiconductor).
* ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere.
* e•MMC is a trademark of the JEDEC Solid State Technology Association.
* MIPI is a licensed trademark of MIPI Alliance, Inc. in the U.S. and other jurisdictions.
* ApP Lite is a trademark of Toshiba Corporation.
* All other trademarks and trade names are properties of their respective owners.
For further information about this product, please visit:
http://toshiba.semicon-storage.com/ap-en/product/assp/applite/tz1200.html