VESA has published the newest Embedded DisplayPort (eDP) standard, v1.4a. The standard incorporates Display Stream Compression (DSC) v1.1, enabling resolutions up to 8k.
As well as higher resolution, the higher data transfer speed of v1.4a (compared to v1.4) enables eDP to achieve greater colour depth and higher refresh rates. These additions were made to take advantage of higher GPU video performance and newer display technologies.
DisplayPort v1.3 is used as the base specification, with the HBR3 link rate (8.1Gbps per lane) now part of eDP v1.4a. It is the combination of HBR3 and DSC v1.1 that enables 8k resolution.
A new feature is Multi-SST Operation (MSO), which supports a new segmented panel display architecture. The architecture is intended to enable thinner, lighter and lower-cost panels that use less power. Using MSO, the four high-speed eDP lanes can be divided up between two or four independent panel segments. For lower resolutions, two lanes can support two segments. Each segment can contain a separate timing controller with integrated source drivers, enabling a higher level of integration on high-resolution displays.
The partial update capability of Panel Self Refresh (this saves power by not updating pixels that do not change in an image) has also been refined in v1.4a.
VESA expects eDP v1.4a will be used in systems by 2016.
